EPD Update Procedure¶
The update procedure includes 8 steps as shown on the right side.
- Power on screen
- Reset the CoG driver
- Read the OTP data
- Initialize the COG driver
- Send the image
- Update the COG
- Stop DC/DC
- Power off screen
Power on screen¶
The initial state before start has VCC/VDD, /RESET, D/C, /CS, SDA, SCL kept at 0V.
In order to the inrush current will cause other issue. It is recommended to add start DC/DC when VCC/VDD is turned on.
Perform in the following order.
| Step | Pin/Register | Data/Value | Name/Unit | Comment |
|---|---|---|---|---|
| GPIO | POWER | HIGH | External MOSFET power driver | |
| GPIO | D/C | HIGH | Data if HIGH, command if LOW | |
| GPIO | /RESET | HIGH | Panel reset, active LOW | |
| GPIO | Panel /CS | HIGH | SPI chip select, active LOW | |
| GPIO | !BUSY | INPUT | Input, floating | |
| SPI | CLK | SPI clock | ||
| SPI | SDA | SPI data |
Reset the CoG driver¶
Note
Included in function COG_reset()
| Step | Pin/Register | Data/Value | Name/Unit | Comment |
|---|---|---|---|---|
| GPIO | POWER | HIGH | Set POWER HIGH | |
| Delay | 20 | ms | Make sure POWER is stable | |
| GPIO | RESET | HIGH | Set RESET HIGH | |
| Delay | 10 | ms | ||
| GPIO | RESET | LOW | Set RESET LOW | |
| Delay | 20 | ms | ||
| GPIO | RESET | HIGH | Set RESET HIGH | |
| Delay | 10 | ms | ||
| GPIO | BUSY | HIGH? | Proceed to next step when HIGH Otherwise, continue waiting |
|
| Delay | 10 | ms |
Proceed to next step “Read the OTP data”.
If the OTP data is already read and available, proceed to Initialise the COG driver.
Read the OTP data¶
Note
Included in function COG_getDataOTP()
This step is performed once, as long as the host retains the values. If the host loses the values, the host should perform this step again.
Info
The maximum clock speed of the display is 2.5MHz (Read).
The SPI sequence for reading the OTP follows:
| Step | Pin/Register | Data/Value | Name/Unit | Comment |
|---|---|---|---|---|
| GPIO | /CS | LOW | Select | |
| GPIO | D/C | LOW | Command mode | |
| SPI3 | 0x70 | SPI3 = SCK, SDIO, CS plus D/C | ||
| GPIO | D/C | HIGH | Data mode | |
| SPI3 | Read 2 bytes | Read the chip ID (expected is 0x03, 0x02) | ||
| SPI3 | 0x90 | No data sent, just index | ||
| SPI3 | 0xa2 | [0x00, 0x15, 0x00, 0x00, 0xE0] | Sets the start address for OTP reading | |
| GPIO | BUSY | HIGH? | Proceed to next step when HIGH Otherwise, continue waiting |
|
| SPI3 | 0x92 | Assigns the start address for OTP reading | ||
| SPI3 | 1 byte | Reads 1 dummy byte | ||
| SPI3 | 224 bytes | Reads 224 data bytes | ||
| GPIO | RESET | LOW | Set RESET LOW | |
| Delay | 40 | ms | ||
| GPIO | RESET | HIGH | Set RESET HIGH | |
| Delay | 10 | ms | ||
| GPIO | BUSY | HIGH? | Proceed to next step when HIGH Otherwise, continue waiting |
|
| GPIO | /CS | HIGH | Unselect |
Store the OTP data in memory to avoid reading it at each update.
Initialize the COG Driver¶
Note
Included in function COG_initial()
Warning
Reset the COG before initializing, then proceed below.
| Step | Pin/Register | Data/Value | Name/Unit | Comment |
|---|---|---|---|---|
| SPI | 0xE6 | Environment temperature | TEMP | 1 byte |
| SPI | 0xE0 | 0x02 | 1 byte | |
| SPI | 0xA5 | Just the index | ||
| GPIO | BUSY | HIGH? | Proceed to next step when HIGH Otherwise, continue waiting |
|
| SPI | 0x01 | OTP[16] | 1 byte, OTP address: 0x1510 | |
| SPI | 0x00 | OTP[26-27] | 2 bytes | |
| SPI | 0x61 | OTP[19-22] | 4 bytes | |
| SPI | 0x00 | OTP[17-18] | PSR | 2 bytes, OTP address: 0x1511 – 0x1512 |
| SPI | 0x06 | OTP[23-25] | 3 bytes | |
| SPI | 0x03 | OTP[30-32] | 3 bytes, OTP address: 0x151e – 0x1520 | |
| SPI | 0xe7 | OTP[33] | 1 byte, OTP address: 0x1521 | |
| SPI | 0x65 | OTP[34-37] | 4 bytes, OTP address: 0x1527 | |
| SPI | 0x30 | OTP[38] | 1 byte, OTP address: 0x1513 – 0x1516 | |
| SPI | 0x50 | OTP[39] | 1 byte, OTP address: 0x1527 | |
| SPI | 0x60 | OTP[40-41] | 2 bytes, OTP address: 0x1528 – 0x1529 | |
| SPI | 0xe3 | OTP[42] | 1 byte, OTP address: 0x152a | |
| SPI | 0xFF | 0xA5 | 1 byte | |
| SPI | 0xEF | OTP[43-50] | 8 bytes | |
| SPI | 0xDC | OTP[59] | 1 byte | |
| SPI | 0xDD | OTP[60] | 1 byte | |
| SPI | 0xDE | OTP[61] | 1 byte | |
| SPI | 0xE8 | OTP[62] | 1 byte | |
| SPI | 0xDA | OTP[63] | 1 byte | |
| SPI | 0xFF | 0xE3 | 1 byte | |
| SPI | 0xE9 | 0x01 | 1 byte |
Send the Image¶
Note
Included in function COG_sendImageDataNormal()
| Step | Pin/Register | Data/Value | Name/Unit | Comment |
|---|---|---|---|---|
| SPI | 0x10 | Image data | The data is the NEW image data that you want displayed next moment |
The index of the image buffer is 0x10.
Sending the image data array to this register requires defining the size of the array. To do so, take note of the buffer size according to your EPD screen size, as seen below.
| Size | 5.8” | 7.4” |
|---|---|---|
| Bytes | 46080 | 96000 |
There are 2-bit data per pixel to define 4 colors.
| Data | Colour |
|---|---|
| 00 | Black |
| 01 | White |
| 10 | Yellow |
| 11 | Red |
Example
The first byte represents the 1st…4th pixels of the first line.
The second byte represents the 5th…8th pixels of the first line, and so on.
Update the COG¶
Note
Included in function COG_update()
Send the Update Command¶
| Step | Pin/Register | Data/Value | Name/Unit | Comment |
|---|---|---|---|---|
| SPI | 0x04 | Power on DC/DC | ||
| GPIO | !BUSY | HIGH? | Wait for !BUSY = HIGH | |
| SPI | 0x12 | 0x00 | Display refresh | |
| GPIO | !BUSY | HIGH? | Wait for !BUSY = HIGH |
Stop DC/DC¶
Note
Included in function COG_stopDCDC()
| Step | Pin/Register | Data/Value | Name/Unit | Comment |
|---|---|---|---|---|
| SPI | 0x02 | 0x00 | Turn off DC/DC | |
| GPIO | !BUSY | HIGH? | Wait for !BUSY = HIGH | |
| SPI | 0x00 | 0x07, 0x2B, 0x01 | 3 bytes | |
| DELAY | 400 | ms | ||
| SPI | 0xFF | 0xA5 | 1 byte | |
| SPI | 0xEE | 0xA0, 0x1E | 2 bytes | |
| DELAY | 4 | ms | ||
| SPI | 0xEE | 0x00, 0x00 | 2 bytes | |
| DELAY | 3 | ms | ||
| SPI | 0xFF | 0xE3 | 1 byte | |
| DELAY | 6 | sec |
Power the screen off¶
| Step | Pin/Register | Name/Unit | Name/Unit | Comment |
|---|---|---|---|---|
| GPIO | D/C | LOW | Data if HIGH, command if LOW | |
| GPIO | /RESET | LOW | Panel reset, active low | |
| GPIO | Master and Slave Panel /CS | LOW | SPI chip select, active low | |
| GPIO | SDA and SCK | LOW | SPI data and clock, active low | |
| DELAY | 200 | ms | ||
| GPIO | POWER | LOW | External MOSFET power driver | |
| DELAY | 120 | ms |
The EPD update procedure is completed.